Inverter series optical power

Can CMOS optical receiver work with low supply voltage?

The main channel can work with low supply voltage. The static power consumption of the front-end is 19.1 mW. The technique to reduce signal overshoot and keep circuit stability. In the design of CMOS optical receivers, it is challenging to compromise the bandwidth, noise, and gain of the transimpedance amplifier (TIA).

Can inductorless inverter-based front-end be used for 10 Gb/s optical receivers?

In this paper, we proposed a new inductorless inverter-based front-end for 10 Gb/s optical receivers. The main channel of the circuit is based on the inverter cascaded structure, and the balance between bandwidth, gain and noise is achieved by setting the appropriate stages and compensation.

How much power does an optical receiver front-end use?

Thanks to the current reuse of inverters and voltage logic mode (VML) buffer, the power consumption of the front-end is low. The simulation results confirm that the circuit has good eye-opening and the static power consumption is 19.1 mW. 2. Circuit design Fig. 2. shows the simplified block diagram of the proposed optical receiver front-end.

What is a 3-stage cascaded inverter?

A 3-stage cascaded inverter is used to obtain a higher amplifier gain so that the feedback resistor R 1 has a larger margin to reduce noise without compromising the bandwidth. Transistors M 1, M 2 and M 3 are designed as the variable resistor controlled by AGC, which is used to adjust the transimpedance gain of TIA.